Xinyuanyi · Storage acceleration
Do not add cards first. An all-flash NVMe-oF array plus KV-cache tiering returns the compute wasted on long-context re-computation. Every figure carries its denominator; reports are downloadable. Start with a free joint test against your own workload.
More usable throughput on the same GPUs — joint-test first, scale cards later.
+29–40% throughput, TTFT −26–32%. Denominator: Qwen3-Coder-480B-FP8, TP=8, long-context cold recovery, versus a local NVMe drive (measured, R2/R3).
Faster cold starts and model switches — more tenants on the same GPU pool.
6.2–9.3× model loading. Denominator: Huawei Atlas 910B versus an NFS baseline (DeepSeek-32B 691 s → 112 s; 70B 1399 s → 150 s; measured, R9, Ascend platform labeled).
A tenant-verifiable differentiator; storage spend far below GPU spend.
Throughput and load figures as above. Storage is within about one-tenth of GPU cost (joint-test basis, not a price quote). FX100 / FX200 / FX300 ship today; FX400 is not a shipping SKU.
The four figures below come from signed / official reports, downloadable in the Evidence Library. Unqualified adjectives do not appear on this page.
480B production topology, long-context cold-recovery load: +29% at concurrency 8 (lower bound), +40% at the optimal operating point (concurrency 16), +35–36% whole-machine TP4×2.
480B TP8, three concurrency levels: TTFT p50 down from 10.17–35.73 s to 7.53–26.35 s.
Re-compute baseline TTFT p50 149.5 s (conc 16) vs 11.85 s on FX100; throughput 4.1 vs 74.9 tok/s.
Huawei Atlas 910B platform: DeepSeek-32B serving load 691 s → 112 s (6.2×), DeepSeek-70B 1399 s → 150 s (9.3×).
Acceleration comes from our own product line, not a resold third-party stack: FX-series all-flash NVMe-oF arrays in production, plus a KV-cache tiering stack we adapted at source level on vLLM + LMCache (including our parallel-read patch). Specs are vendor figures; contract pricing governs.
In production — the platform behind this round of MI308X / 910B signed benchmarks
In production — lowest cost per TB of the three shipping tiers
In production — PCIe 5.0 performance tier (with 6× DPU)
FX400 is a 2026-08 test unit, GA expected late 2026. It is not a shipping SKU and must not be written into this round's joint-test bill of materials.
Joint test first, decisions second: gate-based acceptance with built-in stop-loss. The main gate matches the measured band: TTFT reduction ≥25% and throughput gain inside +29–40%; stop-loss if missed. Test data and the report are yours.
All materials delivered and inspected; each array passes power-on self-test with all 24 drives recognized.
Single-node 8-GPU inference baseline reproduced (R1 basis ±10%); single-array local stress test reaches the 83% line-efficiency anchor.
KV tiering acceleration: TTFT reduction ≥25% and throughput gain within the measured +29–40% band; 8 nodes sharing one array approach the NIC ceiling on read-back.
72-hour continuous stress with no interruption; single-drive / single-link fault injection transparent to the workload; signed joint-test report issued.
R2 / R3 cover 480B throughput and TTFT; R9 covers model loading versus NFS (Ascend). R8 is reproducible code and raw data, available on request.
Contact: Wang Limin · +86 13161818898 · mingxin@agentmail.to
This site presents business-cooperation information and constitutes neither an investment offer nor any promise of returns. Measured data come from signed / official test reports (see the Evidence Library); vendor specs, public sources and estimates are labeled as such.